Decision map
From requirement to controlled release.
Keep decisions traceable from the product requirement to the manufacturing package and its acceptance evidence.
Turn product requirements into design constraints.
Record interfaces, supply rails, current, timing, frequency, operating environment, mechanical envelope, connectors, mounting, regulatory needs, service life and test strategy before the board architecture is fixed. Separate confirmed requirements from targets and open questions.
Interfaces and power
Voltage, current, timing, bandwidth, protection, isolation and return-path needs.
Envelope and interfaces
Outline, mounting, connector positions, keep-outs, height, enclosure and thermal contacts.
Build and service
Quantity, component life, test access, repair, traceability and change-control expectations.
Keep schematic intent, parts and constraints synchronized.
A schematic should communicate more than connectivity. It should identify power intent, component values and part numbers, net classes, special constraints, do-not-fit options, test points and relevant notes. The BOM should be generated from the controlled design database and reviewed for availability and package consistency.
- Use stable net naming and sheet structure that supports review and debugging.
- Validate symbols, footprints, pin mapping, polarity and manufacturer package data.
- Record approved alternates separately from unreviewed sourcing suggestions.
- Run electrical rule checks and close or document every intentional exception.
Select stackup before critical routing is frozen.
Layer count, dielectric thickness, copper, reference planes and finished thickness set the physical environment for controlled impedance, return current, power distribution and manufacturability. Coordinate the proposed stackup with the fabricator when material or geometry margins are sensitive.
Stackup design questions
Resolve these before detailed routing creates dependencies on an unconfirmed construction.
| Signal layers | Which nets need adjacent uninterrupted reference planes and controlled geometry? |
|---|---|
| Power structure | How are supply and return distributed, decoupled and connected across layers? |
| Impedance | Which interfaces need a target, tolerance, reference layer and routing rule? |
| Via strategy | Will through, blind, buried or microvias be used, and what does that imply for lamination? |
| Manufacturing fit | Are materials, copper, thickness and geometry supported by the intended production route? |
Place for electrical behavior, assembly and access.
Placement determines routing quality, return paths, thermal performance, assembly sequence and test access. Lock mechanical interfaces first, then power, clock, memory, RF and high-current relationships. Review component orientation, package spacing, edge clearance, tooling and underside conflicts.
Keep relationships short
Place clocks, oscillators, regulators, decoupling, memory and RF networks from their current loops.
Create process access
Support stencil release, inspection, soldering, rework and component orientation review.
Honor the product
Align connectors, fasteners, keep-outs, enclosure walls, heatsinks and cable approach.
Route the current path, not only the signal line.
High-speed and RF routing depends on reference continuity, return-current path, transitions, coupling, loss and termination—not visual neatness. Power integrity depends on impedance across frequency, plane geometry, decoupling placement and current paths. Define rules from interface requirements and verify the result at the appropriate fidelity.
- Keep reference planes continuous under critical signals and control layer transitions.
- Route differential pairs from the interface requirement, including coupling and skew needs.
- Separate noisy, sensitive, high-voltage and high-current regions by actual current paths.
- Review via stubs, connectors, test points and discontinuities on critical nets.
Resolve RF, thermal and EMC interfaces at board level.
RF launches, antenna keep-outs, shielding, grounding and low-loss materials must agree with the mechanical product. Thermal paths depend on copper, vias, component interfaces and airflow. EMC performance follows current loops, reference structures, filtering, cable exits and enclosure behavior.
Cross-domain review
Identify who owns each model, assumption and acceptance result.
| RF | Frequency, loss budget, launch, antenna, grounding, shielding and material construction. |
|---|---|
| Thermal | Power dissipation, junction limits, copper spreading, thermal vias, interface materials and airflow. |
| EMC | Source and victim paths, filters, return continuity, cable interfaces, chassis bonding and test plan. |
| Safety | Clearance, creepage, isolation barriers, materials and applicable product standard. |
Use DFM, DFA and DFT as different release gates.
DFM checks whether the bare board can be fabricated reliably. DFA checks placement, soldering, inspection and assembly access. DFT checks whether faults and functions can be evaluated with the available test points, fixtures, software and limits. Close findings before data is released for purchasing or tooling.
Fabrication
Stackup, geometry, drills, copper, mask, finish, outline, panel and tolerances.
Assembly
Footprints, spacing, orientation, stencil, soldering, inspection and rework access.
Test
Coverage, access, fixtures, interfaces, software, limits and returned evidence.
Release one coherent manufacturing package.
Generate production outputs from the approved design database, then verify them as a package. Do not mix manually edited outputs from different revisions. Include a release note that identifies the board revision, tool version if relevant, known variants, open deviations and the approvers.
Design-to-manufacturing handoff
Ownership stays visible across customer, designer and manufacturer.
| Designer | Maintains design intent, source database, controlled outputs, rule results and approved revision. |
|---|---|
| Customer / product owner | Approves requirements, variants, risk, compliance, acceptance and commercial release. |
| Manufacturer | Reviews manufacturability, proposes documented changes and builds the approved production package. |
| Shared gate | Close DFM questions, freeze revisions, record approvals and define returned evidence before production. |
Common risks to close before production.
Use these as review prompts. The project-specific decision still follows the released design, build route and acceptance requirements.
- Product requirements remain verbal and cannot be traced to layout or acceptance decisions.
- A symbol, footprint or pin map is copied without checking the selected manufacturer package.
- Critical routing is completed before the material and stackup route is reviewed.
- Signal lines look controlled but their return paths are broken by splits or layer transitions.
- Manufacturing outputs are regenerated after approval without a new revision or release review.
- DFM changes are accepted in email but not incorporated into the controlled design source.