Resources / bare-board engineering

PCB Manufacturing Guide

A practical route through materials, stackup, routing density, vias, impedance, fabrication, inspection and production release.

PCB fabrication panels and manufacturing process equipment in a production environment
Existing PCBArise production image

Quick answer

What this guide helps you control

PCB manufacturing converts released design data into a bare board through imaging, lamination, drilling, plating, solder mask, surface finish, profiling and electrical test. Manufacturability depends on the complete construction—not one headline limit such as layer count or minimum trace.

Best used before release

Use this guide when preparing a bare-board quotation, comparing fabrication technologies, or transferring a board from prototype to volume.

Decision map

From requirement to controlled release.

Start with the electrical and mechanical requirement, then lock the construction and evidence before schedule and price are treated as final.

01Define use conditionsElectrical, thermal, mechanical and reliability needs
02Select constructionMaterial, layer count, stackup, copper and thickness
03Resolve featuresTrace, space, via structure, impedance and finish
04Review the dataDFM, panelization, coupons and acceptance
05Release productionElectrical test, records, changes and repeatability
01 / Materials

Choose laminate from the operating requirement.

FR-4 covers many rigid-board applications, but material selection changes when temperature, frequency, loss, movement, thermal transfer, high voltage or reliability requirements become dominant. Specify the material family or performance requirement, not an unverified trade name alone.

Rigid

FR-4 and high-Tg

General electronics, industrial control and thermally demanding rigid constructions.

Flexible

Polyimide systems

Dynamic or static bending, space reduction and interconnect replacement with bend controls.

RF / microwave

Low-loss materials

Frequency-dependent dielectric performance, copper profile, stackup and controlled fabrication.

02 / Construction

Treat layer count and stackup as one electrical structure.

A multilayer stackup sets dielectric thickness, copper weight, finished thickness, plane relationships and the geometry available for impedance. Ask the fabricator to review the proposed construction before routing is frozen when material availability, thickness or impedance margins are tight.

Stackup release inputs

The drawing, data and impedance table should describe the same construction.

Stackup release inputs
Layer orderSignal, plane and mixed layers named consistently from top to bottom.
MaterialLaminate family, Tg or performance requirement, core and prepreg expectations.
CopperBase and finished copper requirements, including heavy-copper areas or plating effects.
ThicknessFinished board thickness and any local or flexible-region constraints.
ImpedanceTarget, tolerance, layer, reference plane, trace type and coupon or reporting needs.
03 / Technology route

Use the simplest board technology that meets the requirement.

Rigid, flex, rigid-flex, HDI, RF and heavy-copper boards each introduce different material, registration, lamination, drilling and inspection controls. A technology label is only the start; the released construction must identify the actual features that require that route.

Rigid / multilayer

Conventional build

Through vias and standard lamination where density and layer transitions allow it.

HDI

Microvia build-up

Fine-pitch escape, smaller form factor and sequential lamination with defined via architecture.

Flex / rigid-flex

Bend-controlled

Material transitions, coverlay, stiffeners, bend regions and mechanical documentation.

04 / Geometry

Review trace, space, holes and vias against the complete construction.

Minimum features depend on copper, material, layer, plating, aspect ratio, via type, registration, quantity and production route. Avoid treating a published capability table as a blanket design rule. Confirm the proposed line/space and hole structure against the released files.

Via and hole decisions

Define structure and acceptance instead of using “small via” as the specification.

Via and hole decisions
Through viaFinished hole, pad, annular ring, aspect ratio and plating requirement.
Blind / buried viaConnected layers, lamination sequence, drill type and registration.
MicroviaSpan, diameter, capture pad, stacked or staggered construction and fill.
Via-in-padFill, planarization, cap plating and component land-pattern implications.
Mechanical featureSlot, cutout, countersink, tolerance and drawing definition.
05 / Electrical interfaces

Connect impedance and surface finish to use conditions.

Controlled impedance follows dielectric properties, copper geometry, copper profile, trace thickness and reference-plane relationships. Surface finish follows assembly compatibility, shelf life, contact use, pitch, flatness and cost. Neither should be chosen as a generic premium option.

  • Identify each impedance class, target, tolerance, layer and reference plane.
  • Agree whether the fabricator may adjust trace width to the production stackup.
  • Choose finish from assembly, wire-bonding, contact, storage and environmental requirements.
  • Define selective finishes and gold fingers clearly on the fabrication drawing.
06 / Process

Understand where fabrication evidence is created.

A typical multilayer flow includes engineering review, material preparation, inner-layer imaging and etching, inspection, layup and lamination, drilling, desmear and plating, outer-layer processing, solder mask, legend, surface finish, profiling, electrical test and final inspection. The exact route changes with technology.

Before lamination

Inner-layer control

Artwork, etch, registration and optical inspection establish buried features.

After drilling

Interconnect formation

Hole preparation, copper deposition and plating form the vertical connection.

Final acceptance

Test and inspection

Electrical test, dimensions, finish, visual criteria and required reports close the lot.

07 / DFM

Use DFM to close assumptions before production.

DFM review should reconcile fabrication data, drawing, stackup, impedance, materials, tolerances, panelization and acceptance criteria. It is not permission to silently alter the design. Record proposed changes and the required approval route.

  • Confirm data and drawing revision, units, origin and board outline.
  • Resolve drill-to-copper, annular ring, mask dams, copper-to-edge and routing concerns.
  • Review panel rails, tooling, fiducials, breakaway method and assembly constraints.
  • Document any supplier engineering adjustment and customer approval before release.
08 / Release

Separate board inspection from product function.

Bare-board electrical test checks the manufactured networks against the approved data. AOI and visual inspection address artwork and workmanship conditions. Cross-sections, impedance coupons, microsections or material records may be required for selected projects. These do not prove assembled product function.

Production-release controls

Set the records that match product risk; do not request evidence without an acceptance use.

Production-release controls
PrototypeCapture stackup, material, DFM decisions, test results and any deviations.
PilotValidate the intended production construction, panel, tooling and acceptance package.
VolumeControl revisions, approved materials, repeatability, lot records and change notification.
ChangeEvaluate material, stackup, finish, source or process changes before they reach production.
Release checks

Common risks to close before production.

Use these as review prompts. The project-specific decision still follows the released design, build route and acceptance requirements.

  • Stackup drawing and impedance table refer to different layer names or thicknesses.
  • A headline minimum trace or drill value is applied without copper and construction context.
  • Via-in-pad is drawn but fill, cap and planarization requirements are not defined.
  • Surface finish is chosen without assembly, contact or storage requirements.
  • Supplier engineering changes are accepted informally and not reflected in released data.
  • A successful prototype is treated as a controlled volume-production baseline without a release gate.

Frequently asked questions

Questions to close before the next handoff.

Visible answers and FAQPage structured data use the same approved content.

What files are needed for a PCB fabrication quote?

Send Gerber or ODB++, drill data, fabrication drawing, stackup, impedance table, quantity and any material, test, panel or certificate requirements.

How should I choose a PCB material?

Match dielectric, thermal, mechanical, environmental and availability requirements to the application, then confirm the proposed laminate and stackup during engineering review.

Does the minimum trace width apply to every board?

No. Practical line and space depend on copper, layer, material, plating, registration, quantity and production route. Confirm the proposed geometry against the full construction.

When is HDI needed?

Use HDI when fine-pitch escape, routing density, thickness or form-factor needs cannot be met efficiently with conventional through-via multilayer construction.

What does bare-board electrical test prove?

It checks network continuity and isolation against the approved production data. It does not prove assembled component performance or finished-product function.

What should be frozen before volume production?

Freeze the approved design data, drawing, stackup, materials, finish, panelization, impedance, acceptance criteria and the route for supplier or customer changes.

AuthorGangan Zhong
Technical reviewerYang Zuoming
PublishedSeptember 1, 2026
Last reviewedSeptember 14, 2026

Editorial source note: this page organizes PCBArise service information and established PCB/PCBA engineering practices into a planning guide. Capability, material, process, schedule and acceptance statements remain subject to review of the released project files.

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Primary sources

Technical references

These public first-party references support the standards context used in this guide. Project acceptance still follows the released files and agreed requirements.